Co-Simulation of Thermal and Electrical Effects in 3D-IC Packages

In 3D-IC packages, thermal and electrical effects are fundamentally coupled. A thermal simulation that ignores current-induced heating, or an electrical simulation that ignores temperature-dependent material properties, will underestimate failure rates in the field.

The Coupling Problem

As junction temperature rises, metal interconnect resistivity increases by approximately 0.4%/°C for copper. In a high-current power delivery path, this creates a positive feedback loop: higher current → higher resistance → more heating → higher resistance. In extreme cases this can lead to thermal runaway.

At the same time, substrate dielectric properties change with temperature. The loss tangent of a typical build-up film increases by roughly 30% between 25°C and 85°C operating temperature, directly degrading signal eye quality.

FlowSim's Co-Simulation Approach

FlowSim solves the coupled electro-thermal problem iteratively. Starting from an initial temperature distribution (typically ambient), we compute the electrical operating point, extract joule heating densities at each conductor segment, solve the thermal problem, and update material properties before repeating. Convergence is typically achieved in 3–5 iterations for DC conditions and 10–20 for transient thermal analysis.

The mesh shared between the electrical and thermal solvers avoids interpolation error that plagues decoupled approaches. In our validation against infrared microscopy measurements of a 2.5D package, the coupled model predicted hotspot temperatures within 2°C; the decoupled model was off by 11°C.

Implications for Design

Designers should run co-simulation early enough to influence floorplanning. The most impactful interventions — TSV placement, thermal interface material selection, power map optimization — are all constrained by decisions made before detailed layout begins.

FlowSim generates a thermal risk map at the schematic stage, flagging hotspot candidates before a single via is placed. This has been shown to reduce late-stage thermal redesign by over 60% in our early access cohort.